#ifndef __dma_h
#define __dma_h
#include "oslib/os.h"

//??? estimated to be about 2s
#define DMA_DEFAULT_TIMEOUT 300


typedef enum
{
  DMA_NONE,
  DMA_IOP321,  // IYONIX pc
  DMA_S3C2440  // A9home
} DMAType;


#define A9HOME_DMA_BASE 0xC0300000U

#define IYONIX_DMA0_BASE 0xF9BFE400U
//#define IYONIX_DMA1_BASE

typedef struct
{
  int dummy;
} dma_driver;


#define DMAERR_SUCCESS         0
#define DMAERR_OUT_OF_MEMORY  -1
#define DMAERR_


extern dma_driver dma_drivers[];


extern DMAType dma_type;
extern unsigned dma_base;

#if 0
/* Initialise the DMA library and return an indication of whether DMA is available */

os_error *dma_init(bool *available);

void dma_fin(void);

int dma_build_transfer(dma_transfer *, );
int dma_add_to_transfer(dma_transfer *, unsigned src, unsigned dst);

dma_start_transfer(dma_transfer *);
dma_wait_completion(dma_transfer *);



/* os_error *dma_start_transfer(unsigned src, unsigned dst, unsigned len); */
//extern os_error *dma_start_transfer(const byte *pd);
#define dma_start_transfer dma_drivers[dma_type].start

/* os_error *dma_wait_completion(int timeout); */
//extern os_error *dma_wait_completion(int timeout);
#define dma_wait_completion dma_drivers[dma_type].wait_completion

//extern unsigned dma_read_reg(unsigned reg_offset);

#else
os_error *dma_start_transfer(unsigned dma_base, const byte *pd);
os_error *dma_wait_completion(unsigned dma_base, int timeout);
#endif

#endif
